Dr. Assaf Mansour

Position: Associate Professor/Discipline Coordinator

Email: mansour.assaf@usp.ac.fj

Phone: +679 3232593








Dr. Assaf joined The University of the South Pacific (USP) in 2010. Prior to USP, he was an Associate Professor of Centre for Information and Communications Technology, at The University of Trinidad and Tobago. Before that, he served as a Research Scholar and Lecturer at The School of Information Technology and Engineering (SITE) of the University of Ottawa (UOO), Ottawa, Ontario, Canada. He received his Ph.D. in Electrical and Computer Engineering from UOO where he also received his M.A.Sc. in Electrical Engineering and the B.A.Sc. degree in Telecommunications. He holds a B.Sc. degree in Applied Physics from The Lebanese University (LU). His research interests are in the areas of computer architecture, mixed-signal analysis, hardware/software co-design and test, fault-tolerant computing, distributed detection in sensor networks, and RFID technologies. He has published over 60 papers in journals and refereed conference proceedings. He has supervised and co-supervised over 25 Master’s and Ph.D. students

COURSES Teaching:

EE224 – Signals and Systems
EE326 – Embedded Systems
EE467 – Telecommunication Systems and Network Engineering

Research Interest

Dr. Assaf is fascinated by the mechanisms involved in detecting/correcting errors in Mixed-signal and IP core-based Embedded Systems. His research program uses data from experiments to develop a detailed mathematical model of faults that may occur in electrical and electro-mechanical systems. He applies this modeling to optimize fault detection techniques. These applications tend to reveal limitations of the model and areas for further theoretical research. This in turn facilitates the formulation of new hypotheses to test in further experiments. This cycle of experimentation, model building and application keeps his research focused and integrated.

Sample Awards:

2003 IEEE DONALD G. FINK PRIZE PAPER AWARD – for the paper: “Fault Tolerance in Systems Design in VLSI Using Data Compression Under Constraints of Failure Probabilities.”, published in December 2001 issue of IEEE Transactions on Instrumentation and Measurement


The IEEE Donald G. Fink Prize Paper Award was established by the IEEE Board of Directors in 1979. It is presented for the most outstanding survey, review, or tutorial paper published in the IEEE Transactions, Journals, Magazines, or in the Proceedings of the IEEE between 1 January and 31 December of the preceding year.

This prize paper is awarded on recommendation of the Prize Papers/Scholarship Awards Committee and the Awards Board. The award consists of a certificate and honorarium.

The award is named in honor of Donald G. Fink, distinguished editor and author, who was a Past President of the IRE, and the first General Manager and Executive Director of the IEEE.


Professional Activities:

Fiji Institute of Engineers (FIE) https://engineersfiji.org.fj/

Engineering New Zealand (ENGNZ) https://www.engineeringnz.org/

Association for Computing Machinery (ACM) https://www.acm.org/

Institute of Electrical and Electronics Engineers (IEEE) https://www.ieee.org/


Selected Publications:

  1. Assaf, M., Kumar, R.R., Sharma, K., and Sharma, B. (2022). “Optimized Tongue Driven System Using Artificial Intelligence”. Computer Methods in Biomechanics and Biomedical Engineering: Imaging & Visualization, 11. pp. 1-16. ISSN 2168-1163, 2168-1171
  2. Kumar, A.K., Mai, N.N., Kumar, A., Chand, N.V. and Assaf, M. (2022). “Quantum classifier for recognition and identification of leaf profile features”. The European Physical Journal D, 76 (110). NA. ISSN 1434-6060
  3. Prashant P.Lal P.P., Prakash A.A., Chand A.A., Prasad A.K., Mehta U., Assaf M.H., Mani S.F., and Mamun A.K. (2022), “IoT integrated fuzzy classification analysis for detecting adulterants in cow milk”. Sensing and Bio-Sensing Research, 36, 100486. https://doi.org/10.1016/j.sbsr.2022.100486
  4. A. Rashid, K. Deo, D. Prasad, K. Singh and M. Assaf, (2020). “TEduChain: a blockchain based platform for crowdfunding tertiary education”, Part of: Distributed Ledger Technologies: Papers Arising from Three Australian Symposia. DOI: https://doi.org/10.1017/S0269888920000326Published online by Cambridge University Press: 09 June 2020.
  5. P. Khadilkar, S.R. Das, M.H. Assaf, and S. Biswas, “Face Identification Based on Discrete Wavelet Transform and Neural Networks,” International Journal of Image and Graphics, Vol. 19, No. 4, pp. 1-20, September 2019.
  6. Patel J., Assaf M., Mehta U., Singh S., “Verification of data sparsification technique in smart grid communication”, WSEAS Transactions on Communications, Vol. 18, No. 1, pp. 57-65, 2019.
  7. Scott G., Vunakece S., Vosawale D., Assaf M., Mehta U., “A Flexible Dashboard Panel System for Electric Vehicle”, WSEAS Transactions on Electronics, Vol. 10, No. 1, pp. 33-41, 2019.
  8. Williams, M. Assaf. “Intelligent Public Transportation System”, International Journal of Mathematics and Computers in Simulation”, Vol. 12, No. 2, pp. 124-132, 2018. http://www.naun.org/cms.action?id=18789
  9. Singh, M. H. Assaf, and A. Kumar, “A Novel Algorithm of Sparse Representations for Speech Compression/Enhancement and its Application in Speaker Recognition System”, International Journal of Computational and Applied Mathematics (IJCAM), Vol. 11, No. 1, pp. 89-104, September 2016.
  10. P. Narayan, M. H. Assaf, and S. K. Prasad, “Wireless Sensor Enabled Public Transportation System”, International Journal of Communications, Network and System Sciences (IJCNS), Vol. 8, No. 5, pp. 187-196, May 2015.
  11. H. Assaf, R. Mootoo, S.R. Das, E.M. Petriu, V. Groza, and S.N. Biswas, “Designing Home Security and Monitoring System Based on Field Programmable Gate Array,” IETE Technical Review, Vol. 31, No. 2, pp. 168-176, June 2014.
  12. H. Assaf, L-A. Moore and S.R. Das, S.N. Biswas, and S. Morton, “Low – level logic fault testing ASIC simulation environment,” World Journal of Engineering, Vol. 2, No. 3, pp. 279-286, 2014.
  13. Syed, S.R. Das, S. Biswas, M.H. Assaf, and E. Petriu, “On Automated Test System for Asymmetric Digital Subscriber Line Equipment,” World Journal of Engineering, Multi Science Publishing Co, Vol. 10, No. 4, pp. 387-394, September 2013.
  14. H. Assaf, S. Khan, S.R. Das, and S. Biswas, “Energy Efficient Optimization of Wireless Embedded Sensor Networks,” Engineering and NanoEngineering, Multi Science Publishing Co, Vol. 10, No. 3, pp. 273-282, June 2013.
  15. R. Das, J.‑F. LI, A.R. Nayak, M.H. Assaf, E.M. Petriu, S.N. Biswas, “Circuit Architecture Test Verification Based on Hardware Software Co-design with ModelSim,” IETE J. Research, Vol. 59, No. 2, pp. 132-140, March-April 2013.
  16. R. Das, S. Biswas, E.M. Petriu, V.Groza, M.H. Assaf. A.R. Nayak, “Fault-tolerance in VLSI systems design using data compression under constraints of failure probabilities–overview and current status,” World Journal of Engineering, Multi-Science Publishing Co, Vol. 10, No. 1, pp. 73-84, March 2013.
  17. R. Das, L. Jin, M. H. Assaf, S. N. Biswas, and E. M. Petriu, , “Implementing built-in self-test environment for cores-based digital circuits with Verilog HDL”, WORLD JOURNAL OF ENGINEERING, Vol. 9 No. 6, MULTI-SCIENCE PUBLISHING COMPANY LTD. 2012.
  18. R. Das, S. N. Biswas, D. Biswas, E. M. Petriu, and M. H. Assaf, “System-on-chips Design Using ISCAS Benchmark Circuits – An Approach to Fault Injection and Simulation Based on Verilog HDL”, IETE Journal of Research, Vol. 58 No. 2, 2012.

S. R. Das, S. N. Biswas, V. Groza, and M. H. Assaf, “Aliasing- free Space Compaction in VLSI with Cascade of Two-Input OR/NOR Logic”, IJRRCS – International Journal of Research and Reviews in Computer Science, Vol. 3 No. 1, February 2012.

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